MLRISC

MLRISC Contributors Requirements How to Obtain MLRISC

Overview

Problem Statement Contributions MLRISC Based Compiler MLRISC Intermediate Representation MLRisc Generation Back End Optimizations Register Allocation Machine Description Garbage Collection Safety System Integration Optimizations Graphical Interface Line Counts Systems Using MLRISC Future Work

System

Architecture of MLRISC The MLTREE Language MLTree Extensions MLTree Utilities Instruction Selection Assemblers Machine Code Emitters Delay Slot Filling Span Dependency Resolution The Graph Library The Graph Visualization Library Basic Compiler Graphs The MLRISC IR SSA Optimizations ILP Optimizations Optimizations for VLIW/EPIC Architectur... Register Allocator

Back Ends

The Alpha Back End The PA RISC Back End The Sparc Back End The Intel x86 Back End The PowerPC Back End The MIPS Back End The TI C6x Back End

Basic Types

Annotations Cells Cluster Client Defined Constants Client Defined Pseudo Ops Instructions Instruction Streams Label Expressions Labels Regions Regmap

# Regions

Regions

-Overview -MLRisc Regions

### Overview

The MLRISC system uses user defined type called regions to propagate aliasing information to the backend. This type is abstract and no constraint is imposed on how it is implemented. The advantage of this is that the client can optimize the representation of the region information according to the semantics of the source language. The downside of this freedom is that the client has to implement various modules to extract information from the regions datatype required by various optimization phases.

For clients that do not want to implement their own regions datatype, there is now a new generic mechanism, called MLRiscRegions, built on top of the regions concept, for propagating both:

- Aliasing information, and
- Control dependence/anti-control dependence information

Both kinds of information are crucial for extracting parallelism from the target code, and are used in all optimizations that perform code motion, such as SSA optimizations and all scheduling optimizations.

### MLRisc Regions

Lal George
Allen Leung

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Last modified: Fri Oct 11 18:19:52 UTC 2019 by buildd@x86-grnet-02