MLRISC

MLRISC Contributors Requirements How to Obtain MLRISC

Overview

Problem Statement Contributions MLRISC Based Compiler MLRISC Intermediate Representation MLRisc Generation Back End Optimizations Register Allocation Machine Description Garbage Collection Safety System Integration Optimizations Graphical Interface Line Counts Systems Using MLRISC Future Work

System

Architecture of MLRISC The MLTREE Language MLTree Extensions MLTree Utilities Instruction Selection Assemblers Machine Code Emitters Delay Slot Filling Span Dependency Resolution The Graph Library The Graph Visualization Library Basic Compiler Graphs The MLRISC IR SSA Optimizations ILP Optimizations Optimizations for VLIW/EPIC Architectur... Register Allocator

Back Ends

The Alpha Back End The PA RISC Back End The Sparc Back End The Intel x86 Back End The PowerPC Back End The MIPS Back End The TI C6x Back End

Basic Types

Annotations Cells Cluster Client Defined Constants Client Defined Pseudo Ops Instructions Instruction Streams Label Expressions Labels Regions Regmap

# Regmap

A regmap is a mapping from virtual register to virtual or physical register, and is used by MLRISC register allocators to represent the current binding of virtual registers. Regmaps are implemented as Intmap in MLRISC, and are defined in the CELLS interface.

Regmaps are used in phases such as assembly generation and machine code. MLRISC program representations such clusters and IR each contains a global regmap per compilation unit. Representations such as hyperblock may contain its own regmap, which overrides the global regmap.

Lal George
Allen Leung

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Last modified: Fri Oct 11 18:19:52 UTC 2019 by buildd@x86-grnet-02