MLRISC

MLRISC Contributors Requirements How to Obtain MLRISC

Overview

Problem Statement Contributions MLRISC Based Compiler MLRISC Intermediate Representation MLRisc Generation Back End Optimizations Register Allocation Machine Description Garbage Collection Safety System Integration Optimizations Graphical Interface Line Counts Systems Using MLRISC Future Work

System

Architecture of MLRISC The MLTREE Language MLTree Extensions MLTree Utilities Instruction Selection Assemblers Machine Code Emitters Delay Slot Filling Span Dependency Resolution The Graph Library The Graph Visualization Library Basic Compiler Graphs The MLRISC IR SSA Optimizations ILP Optimizations Optimizations for VLIW/EPIC Architectur... Register Allocator

Back Ends

The Alpha Back End The PA RISC Back End The Sparc Back End The Intel x86 Back End The PowerPC Back End The MIPS Back End The TI C6x Back End

Basic Types

Annotations Cells Cluster Client Defined Constants Client Defined Pseudo Ops Instructions Instruction Streams Label Expressions Labels Regions Regmap

# Machine Code Emitters

Machine Code Emitters

-Overview -More Details

### Overview

MLRISC lets the client to directly emit machine code and bypass the traditional assembly mechanism.

Machine code emitters in MLRISC satisfy the signature INSTRUCTION_EMITTER, which is defined as:

     signature INSTRUCTION_EMITTER =
     sig

        structure I : INSTRUCTIONS
        structure C : CELLS
        structure S : INSTRUCTION_STREAM
        structure P : PSEUDO_OPS
           sharing I.C = C
           sharing S.P = P

        val makeStream : Annotations.annotations ->
                          ((int -> int) -> I.instruction -> unit,
                           unit,'b,'c,'d,'e) S.stream

     end

The function `makeStream` returns an instruction stream. The output, a stream of bytes, is direct to the client supplied structure which satisfy the CODE_STRING interface. This signature is defined as follows:

     signature CODE_STRING = sig
       type code_string
       val init          : int -> unit
       val update        : int * Word8.word -> unit
       val getCodeString : unit -> code_string
     end

### More Details

Machine code emitters are automatically generated by the MDGen tool. Some specific generated emitters are listed below:

1. Sparc
2. Hppa
3. Alpha
4. Power PC
5. X86

Lal George
Allen Leung

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Last modified: Mon Oct 3 20:52:35 UTC 2022 by buildd@x86-grnet-02